Texas Instruments TMS320C6457 DSP Fitness Equipment User Manual


 
7.1.3InterleaverData
7.1.3.1ENDIAN_INTR=1
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Endianness
Figure82.TCP_ENDIANRegister
3116
Reserved
R/W
15210
ENDIAN_ENDIAN_
Reserved
EXTRINTR
R/WR/WR/W
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table33.TCP_ENDIANProgrammingRegister
DataNativeFormatDSPMemoryFormatTCP_ENDIAN
InterleaverIndexes16bits(15bitsrightjustified)16bitsNATIVEENDIAN_INTR=1
Packedon32bitsENDIAN_INTR=0
ExtrinsicData8bits(7bitsrightjustified8bitsNATIVEENDIAN_EXTR=1
Packedon32bitsENDIAN_EXTR=0
Table34.InterleaverData
Little_big_endianENDIAN_INTRDescription(MSBtoLSB)
001,0,3,23,2,1,0(halfwords)
010,1,2,33,2,1,0(halfwords)
10Endiannessmanagerhasnoeffect
3,2,1,03,2,1,0(halfwords)
11Endiannessmanagerhasnoeffect
3,2,1,03,2,1,0(halfwords)
IfENDIAN_INTR=1,dataaresavedintheirnativeformat(16bits)intheDSP(seeTable35).
Table35.InterleaverIndexesinDSPMemory
(ENDIAN_INTR=1)
Address(hexbytes)Data
BaseINTER0
Base+2INTER1
Base+4INTER2
Base+6INTER3
SPRUGK1March2009TMS320C6457Turbo-DecoderCoprocessor255
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