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7Endianness
7.1DataMemoryforSystematic
Endianness
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TheTCP2ishalted(orpaused)afterprocessingtheongoingframe.Anycurrentframeprocessingmust
complete.SyncventsforthenewframewillbeholduntilTCP_EMUSUSPisreleased.TheTCP2is
restartedfromthepausedstateandbeginsthenextframeoperations.
InTCP_STATE=14,theTCP_EMUSUSPwillhavenoeffect.TheTCP2willgotothenextstate
(TCP_STATE=0)andthentheemususpwillbeprocessed.
InTCP_STATE=0,theTCP_EMUSUSPwillcausetheemuacktogoactiveifnoEDMA3transactions
areactive.
InTCP_STATE=1,theTCP_EMUSUSPwillcausetheemuacktogoactiveifnoEDMA3transactions
areactive.Thememory_accesserrorbitwillnotgoactiveifemuack=1,andthetcp_intwillnottriggerif
thememoriesareaccessedwhileemuack=1.
Theemususp_rtsignalisnotusedintheTCP2.Bit[2](RT_SEL)fortheemulationregisterisnotincluded
andthebitisreserved.
TheendiannessmanagerisresponsibleformanagingtheendiannessofdatawhenDSPisconfiguredin
bigendianmode.WhentheDSPisconfiguredinlittle-endianmode,theendiannessmanagerhasno
effect.
Thisarchitecturesupportsbothbig-andlittle-endianoperation.
TheTCP2alwaysworksinlittle-endianmode,theinput/outputdatato/fromtheprocessingunitisalways
inlittle-endianformat.Therefore,theroleoftheendiannessmanageristoorderthedatacorrectlywhen
theDSPisconfiguredinbig-endianmode.
Forthedatarepresentedontheconfiguration(CFG)databus,byteendiannessisnotanissue.The
endiannessmanagerhasnoeffecton32-bitdataontheCFGbus.
Inallcasesexceptforinterleaverindexesandextrinsics,theendiannessmanagerswapsthewordswithin
thedouble-wordforallTCP2incoming64-bitdata(Figure57andFigure58)andallTCP2outgoing64-bit
data(Figure59andFigure60).
Figure57.DataSource-EDMA3(BigEndian)
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Figure58.DataDestination-Kernel(LittleEndian)
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Figure59.DataSource-Kernel(LittleEndian)
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Figure60.DataDestination-EDMA3(BigEndian)
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TMS320C6457Turbo-DecoderCoprocessor2 50SPRUGK1–March2009
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