A SERVICE OF

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by inhibiting the PWM through the DROPOUT signal from the l-Second-Delay Circuit. Mains Detect signal, which is
fullwave-rectified ac from the + 5Vdc secondary of the bias-supplies transformer, senses the ac mains voltage. The Dropout
Detector, including comparators A2U20A and A2U20C, operates by enabling a capacitor-timing ramp when Mains-Detect
ceases. Comparator A2U20D monitors the amplitude of Mains-Detect to provide ac surge voltage detection.
1-Second-Delay Circuit
The l-Second-Delay Circuit is the heart of the unit's controlled turn-on. It causes relay A1K1 to bypass inrush
current-limiting resistor A1R1 one second after turn-on, and it enables the PWM 0.1 seconds later. When either the output
of the AC-Surge and Dropout Detector or PCLR2 is low, NAND gate A2U11A holds the circuit reset. The circuit starts
counting at 1/16 the clock frequency (1.25 kHz) when both inputs to A2U11A are high and causes Relay Enable to go high
in 1.0 seconds and DROPOUT to go high in 1.1 seconds. When DROPOUT goes high, it stops the count, and it enables the
PWM.
option 002 uses DROPOUT in creating its DROPOUT output.
Display Circuits
Figure 4-5 is a simplified schematic for the display circuits. The named signals from the CV and CC Circuits are connected
through semiconductor bilateral switches to the VOLTS digital voltage display and to the AMPS digital current display.
Either a blank display or a depressing of the DISPLAY OVP switch changes the VOLTS display from low range to high
range. A blank display occurs when the Voltage DVM A3U4 receives an over-range voltage, a voltage greater than
0.999Vdc. The blank display is detected by the Voltage-Range Switching Circuit. The diode-AND connection at inverting
amplifier A3U9A senses when two selected segments of the 7-segment LED for the second digit are both not lighted. The
detection scheme works because at least one of the selected segments is lighted for all digits 0 though 9.
The normal display is the actual output voltage and current and has bilateral switches A3U1A and A3U1D closed. Switch
A3UlA connects V-MON through buffer amplifier A3U2 and range-switching bilateral switches to the VOLTS DVM.
Switch A3Ul D connects I-MON through buffer amplifier A3U3A to the AMPS DVM. Depress the DISPLAY LIMITS
Switch, and CV and CC PROGRAM Voltages connect through bilateral switches A3U1B and A3U1C to display the
programmed output voltage and current. Depress the DISPLAY OVP Switch, and OV PROGRAM Voltage from the OVP
ADJUST Control connects through buffer amplifier A3U3B and bilateral switch A3U7B to display the programmed OVP
voltage limit. The CV and CC CONTROL Voltages also control the front-panel mode LEDs. When CV CONTROL
Voltage is more negative than CP, transistor A2Q6C lights CV LED A3DS9 showing that the unit is operating in
constant-voltage mode. When CC CONTROL is more negative than CP, transistor A2Q6F lights CC LED A3DS10
showing that the unit is operating in constant-current mode. And when both CV and CC are more positive than CP,
NAND-gate A2U11C lights UNREGULATED LED A3DS11 showing the unit is operating in power-limited, unregulated
mode.