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DM9161B
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
41 Final
Version: DM9161B-12-DS-F01
January 31, 2008
9.4.16 Auto-negotiation and Fast Link Pulse Timing Diagram
FAST LINK
PULSES
Clock Pulse Data Pulse Clock Pulse
t
1
t
2
t
3
FLP Burst
FLP Burst
t
4
t
5
FLP Bursts
t
1
9.4.17 RMII Receive Timing Diagram
100 Mb/s Reception with no errors
9.4.18 RMII Transmit Timing Diagram
100 Mb/s Transmission