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ASUS CUPLE-VM User’s Manual52
4. BIOS SETUP
4. BIOS SETUP
SDRAM Active to Precharge Time
NOTE: This field will only be adjustable when SDRAM Configuration is set to
[User Define].
Bank Interleave [Enabled]
Configuration options: [Enabled] [Disabled]
FSB Acceleration Time [Disabled]
Configuration options: [Enabled] [Disabled]
Read Around Write [Enabled]
Configuration options: [Enabled] [Disabled]
CPU-DRAM Back-Back Transaction [Enabled]
Configuration options: [Enabled] [Disabled]
PCI to DRAM Prefetch [Enabled]
Configuration options: [Disabled] [Enabled]
Byte Merge [Disabled]
To optimize the data transfer on PCI, this merges a sequence of individual memory
writes (bytes or words) into a single 32-bit block of data. However, byte merging
may only be done when the bytes within a data phase are in a prefetchable address
range. Configuration options: [Disabled] [Enabled]
AGP Capability [4X Mode]
Configuration options: [2X Mode] [4X Mode]
Graphics Aperture Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic data.
Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] [128MB] [256MB]
On Chip VGA [Enabled]
Configuration options:
[Disabled] [Enabled]
VGA Shared Memory Size [8MB]
Configuration options: [2MB] [4MB] [8MB]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technology for
the video memory of the processor. It can greatly improve the display speed by
caching the display data. You must set this to UC (uncacheable) if your display card
cannot support this feature; otherwise your system may not boot. Configuration op-
tions: [UC] [USWC]
Onboard PCI IDE Enable [Both]
Configuration options: [Both] [Primary] [Secondary] [Disabled]
Chip Configuration